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Challenges and Opportunities of Small Chip Packaging Technology

08/11/2022 Small chip packaging technology, electronic packaging technology, chip design, wafer fabrication, packaging


  On August 9-11, 2022, as one of the important conferences leading the global electronic packaging technology, the 23rd International Conference on Electronic Packaging Technology (ICEPT 2022) will be held in Dalian. Zheng Li, director and CEO of Changjiang Electronics Technology, attended the meeting and delivered a keynote speech entitled "Challenges and Opportunities of Small Chip Packaging Technology".

  In recent years, with the continuous breakthroughs and innovations in technologies such as the Internet of Things, big data, 5G communication, AI and intelligent manufacturing, the demand for chips with thinner appearance, faster data transmission rate, lower power consumption and lower cost has greatly increased in the industry. , Small chip (Chiplet) technology has received more and more attention from the industry. In his speech on "Challenges and Opportunities of Small Chip Packaging Technology", Zheng Li said that the emergence of advanced packaging has made the industry see the huge potential of promoting high-density integration, performance improvement, volume miniaturization and cost reduction of chips through packaging technology, and has become a driving force for integration. One of the key forces in the development of the circuit industry.

  By modularizing the capabilities of different bare chips (Die), Chiplet utilizes new technologies such as design, interconnection, and packaging to form a system-on-chip. High-performance computing, artificial intelligence, automotive electronics, medical, communications and other "hot" application scenarios in the market have solutions driven by Chiplet's high-density integration.

  Zheng Li believes that Chiplet has become a common and inevitable path in the process of integrated circuit microsystem integration based on the increasing demand for computing power in the era. At present, Chiplet faces challenges in design and testing, industry chain collaboration, and standardization.

  Chiplet is a system engineering, which involves multiple links such as chip design, wafer manufacturing, packaging, and testing. From the perspective of packaging and testing, the core lies in how to truly optimize the layout in the packaging to obtain better performance. At the same time, the development of chip stacking technology will inevitably require the evolution of chip interconnection technology and new and diversified interconnection standards. In March of this year, the UCIe (Universal Chiplet Interconnect Express) industry alliance, which aims to promote the standardization of Chiplet interface specifications, was established. As a leading enterprise in the field of finished chip manufacturing in mainland China, Changjiang Electronics Technology has joined the UCIe Industry Alliance.

  Chiplet advanced packaging requires high-density interconnection. The packaging itself is no longer just packaging a single chip, but must comprehensively consider issues such as layout, chip and package interconnection, which makes high-density and heterogeneous integration technology a hot spot in the industry. The semiconductor industry is supporting various types of Chiplet packaging, such as 2.5D, 3D, SiP and other technologies.

  In response to the needs of market development, Changdian Technology will launch XDFOI™ multi-dimensional advanced packaging technology in 2021, which is an extremely high-density, multi-fan-out packaging high-density heterogeneous integration solution for Chiplets, which utilizes collaborative design. The concept realizes the integration and testing of finished chip products, covering 2D, 2.5D, and 3D integration technologies, and can provide customers with one-stop services from conventional density to extremely high density, from very small to very large size.

  Not long ago, the "Changdian Microelectronics Wafer-Level Microsystem Integration High-end Manufacturing Project" officially started. This project is a major strategic move for JCET to further integrate global high-end technical resources, target the cutting-edge field of chip product manufacturing, and improve customer service capabilities. XDFOI™ multi-dimensional advanced packaging technology will also be one of the production priorities of this high-end manufacturing project.

  Zheng Li said: "Advanced packaging, or the manufacture of finished chips, may become one of the important disruptive technologies in the post-Moore era. The commanding heights. The manufacture of finished chips will profoundly change the shape of the integrated circuit industry chain, and drive the upstream and downstream industry chains including chip design, wafer manufacturing, equipment, and materials to undergo revolutionary changes together. It's obvious."

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