Intel announced its strategy to Catch Up With Samsung TSMC: 3D stacked transistors
Sina technology news, Beijing time December 13 morning news, according to reports, a few days ago, the U.S. computer chip giant Intel's "Component Research Group" announced a number of new technologies, allegedly in the next decade to help Intel chips continue to reduce the size, improve performance, some of the technology ready to stack different chips processing.
The team announced the new technologies through a number of papers at an international semiconductor conference in San Francisco, USA.
In the past few years, in the manufacture of smaller, faster chips (the so-called "X-nanometer chip"), Intel lost to Taiwan's TSMC and South Korea's Samsung Electronics two rivals; now, Intel is doing everything possible to win back the chip manufacturing leader position.
Previously, Pat Gelsinger as Intel trust CEO after the launch of a series of business development plan in 2025 to win back the dominant position. And this time the company's technology team launched a series of "technical weapons" to help Intel in 2025 after the technology advantage has been maintained.
According to reports, the traditional chip manufacturing are in the two-dimensional direction, in a specific area to integrate more transistors. Intel's technology team proposed a new technology breakthrough direction, that is, in the three-dimensional direction of the stack of "small chips" (or "chip tile"), thereby integrating more powerful transistors and computing power per unit volume. The company showed the technology, can be stacked on each other on the small chip to achieve ten times the traditional number of communication connection pipeline, which also means that the future of small chips a stacked on another "body" space is very broad.
Semiconductor on the most important, the most basic components are transistors, they are equivalent to a switch, representing the digital logic system "1" or "0" state. Intel announced at this conference is probably the most important research results, just show a new technology of stacking transistors on top of each other.
Intel's technical team said that through the transistor stacking technology, can make the number of transistors integrated in the unit size of the growth of thirty to fifty percent. The more transistors per unit area, the more powerful the performance of the semiconductor, which is the most important reason and law for the continuous development of the global semiconductor industry in the past 50 years of time.
In an interview with the press, Intel's "Component Research Group" director and senior engineer Paul Fischer said that by stacking semiconductor components on top of each other, Intel's technical team can save chip space, "we are reducing chip internal connection channel length, thus saving energy, which not only improves the chip cost efficiency, can enhance the chip performance."
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